Self bias is one of the several enhancement MOSFET biasing methods. It provides a relatively more stable quiescent point(Q-point) or biasing point than the D-MOSFET zero gate bias method and the D-MOSFET fixed gate bias method but lesser stable Q-point than the voltage divider biasing method. Self bias method is used to bias the MOSFET in its active region where it operates as a current source and is used for amplifying device purpose. Here it is illustrated how one can quickly design Self Biased Depletion
MOSFET with the help of online depletion MOSFET biasing and amplifier
design calculator.With this one can easily and quickly obtain values for biasing resistor values, the coupling capacitors values, the bypass capacitor value, the output current and voltages values from the input current and voltages. For details of how the calculator calculates the values of the components, current and voltages see Best Way to Calculate JFET Self Biasing Circuit.
A self biased depletion MOSFET circuit diagram is shown below.
A brief explanation of how the self biased depletion MOSFET works is as follows. A depletion MOSFET can be biased with negative gate voltage or positive gate voltage(unlike JFET which requires negative gate bias voltage). When self biasing is used the gate biasing voltage is made negative. In order to get negative gate bias voltage the resistor RS is used to create negative gate voltage. The voltage drop across the source resistor RS appears in equal magnitude but opposite polarity at the gate. The resistor RG ensures that the gate current is zero. The drain resistor RD controls the output voltage and the voltage gain from the self biased depletion MOSFET. Depletion MOSFET is normally ON device because for all negative and positive gate voltage there will be current flowing from the drain to source.
Now we explain how we can use the online depletion MOSFET biasing and amplifier design calculator. Consider that we have an input signal of 1KHz and 100mV applied to the gate via the coupling capacitor CC1. Let the power supply be VDD=5V. From the datasheet of the depletion MOSFET you are using, obtain the value for gate to source cutoff voltage VGS(off) and the gate shorted drain current IDSS. Consider LND150 N-channel depletion MOSFET. For LND150 MOSFET we have VGS(off)=-2.2V and IDSS=2.34mA. Assume that the output drain voltage is 2.5V, RG=100KOhm and and the load resistance is 1KOhm. Then entering this information into the calculator we get the output values as shown below.
From the calculator output, the drain current is 1.17mA, the source voltage is 0.647V, the source resistor value is 553Ohm, the drain resistor value is 2.14KOhm, the voltage gain is 3.48, the input impedance is 100KOhm, the output impedance is 681Ohm, the input and output coupling capacitor values are 15.92nF and 2.34uF respectively and the source resistor by-pass capacitor value is 2.88uF. The following shows the circuit diagram with the measured value of voltage and current using circuit simulator is shown below.
As we can see the measured value from circuit simulator and the depletion MOSFET calculator matches.
So in this way one can use the d-MOSFET biasing and amplifier design calculator to easily and quickly design self biased depletion MOSFET amplifier.
