Zero Gate Biased Depletion MOSFET Amplifier Design Example

 Here it is illustrated how to design a zero gate biased depletion MOSFET amplifier. In zero gate biased depletion MOSFET, the gate voltage is applied zero voltage. This works because the depletion MOSFET(DMOS) works on both negative and positive gate voltage. When zero voltage is applied to the gate voltage then the drain current(\(I_D\)) is equal to the gate shorted drain current(\(I_{DSS}\)). In this case, the gate to source voltage, \(V_{GS}\), is equal to zero. When a negative voltage is applied to the gate, then the depletion MOSFET is in depletion mode and works just like a JFET. The positive voltage is applied the depletion MOSFET is in enhancement mode.

The following shows circuit diagram of a zero gate biased depletion MOSFET amplifier.

The input signal VIN of certain amplitude and frequency is applied to the gate via the input coupling capacitor C1. A gate resistor RG is grounded and hence the gate voltage is at 0V. The resistor RD is the drain resistor. The output signal appears at the drain which is coupled to the load resistor RL using the output coupling capacitor C2.

Now the steps to zero bias the depletion MOSFET and calculate the drain resistor value, the input and output coupling capacitor is explained.

Step 1: Assume supply voltage \(V_{DD}\), the input signal frequency, the gate resistor(\(R_G\)) and load resistance

Let \(V_{DD}=+5V\), let the input signal frequency f=1KHz, the gate resistor \(R_G=100k\Omega\)  and the load resistor \(R_L=500\Omega\)

Step 2: Obtain the gate shorted drain current \(I_{DSS}\) and gate to source cutoff voltage \(V_{GS(off)}\)from the depletion MOSFET datasheet.

Here we will use the LND150 N-channel depletion MOSFET and for this we have,

\(I_{DSS}=2.34mA\) and \(V_{GS(off)}=-2.2V\)

Step 3: Assume drain voltage \(V_D\) 

Let , \(V_D=2.5V\)

Step 4: Calculate the drain resistor, \(R_D\) , value

We have, \(V_{DD}=I_DR_D+V_D\)

and so, \(R_D=\frac{V_{DD}-V_D}{I_D}=\frac{5V-2.5V}{2.34mA}=\frac{2.5V}{2.34mA}=1.07k\Omega\)

Step 5: Calculate the ac drain resistance, \(r_d\)

\(r_d = R_D||R_L=\frac{R_LR_D}{R_L+R_D}=\frac{10k \Omega \times 1.07k\Omega}{10k \Omega + 1.07k\Omega}=516.53Ω\)

Step 6: Calculate transconductance, \(g_m\)

\(g_m = \frac{2 I_{DSS}}{|V_{GS(off)}|}=\frac{2 I_{DSS}}{V_p}\) 

or, \(g_m = \frac{2 \times 2.34mA}{2.2V}=2.1mS\) 

Step 7: Calculate voltage gain, \(A_v\)

\(A_v=g_m r_d= 2.1mS \times 516.53Ω = 1\)

Step 8: Calculate the input impedance, \(Z_i\)

\(Z_i = R_G=100k\Omega\)  

Step 9: Calculate the input coupling capacitor,

\(C_1 = \frac{10}{2\pi f Z_i}=15.92nF\) 

Step 10: Calculate the output impedance, \(Z_o\)

\(Z_o =r_d=516.53Ω\)  

Step 11: Calculate the output coupling capacitor,

\(C_2 = \frac{10}{2\pi f Z_o}=3.08\mu F\) 

The above calculated values can be directly determined using the online Depletion MOSFET Biasing & Amplifier Design Calculator.

Now the following shows the circuit diagram with the above calculated component values.

Using circuit simulator software the measured value are as shown.

From the above circuit simulator, it can be seen that the drain current is 2.32mA and that the drain voltage or the drain to source voltage is 2.51V as calculated.

 The transconductance curve of the LND150 depletion MOSFET is shown below.

The location of the Q-point which is (2.5V,2.34mA) on the drain curve of the LND150 depletion MOSFET is shown below.

As can be seen from the above drain curve graph, the Q-point or the biasing point is located in the active region and hence the zero gate biased MOSFET circuit above acts as an amplifier.

The following shows the input and output signal waveform on oscilloscope.

The signal waveform shows that the output signal and the input signal have the same amplitude, has the same frequency as the input signal and 180 degree out of phase. The amplitude of the input signal is 100mV and the output signal amplitude is aproximately 170mV. This is in agreement with the calculated values above since the voltage gain calculated was 1.