A Common Drain JFET Amplifier, also known as a source follower, is a simple and versatile circuit that can be used for a variety of applications. It is particularly useful for amplifying low-level signals and for impedance matching.
There are several advantages to using a Common Drain JFET Amplifier:
High input impedance: The input impedance of a common drain JFET amplifier is very high, which makes it ideal for amplifying low-level signals.
Low output impedance: The output impedance of a common drain JFET amplifier is very low, which makes it ideal for impedance matching.
Voltage gain: The voltage gain of a common drain JFET amplifier is typically between 1 and 2, which makes it suitable for a wide range of applications.
Simplicity: Common drain JFET amplifier is a simple circuit, easy to design and build, which makes it a cost-effective solution for many applications.
Flexibility: The Common Drain JFET Amplifier can be used in a wide range of applications including audio, RF, and microwave.
Linearity: Common Drain JFET Amplifier is a linear circuit, which means that the output signal is directly proportional to the input signal.
Low distortion: Common Drain JFET Amplifier has low distortion, which means that the output signal is a faithful reproduction of the input signal.
Low noise: Common Drain JFET Amplifier has low noise, which means that the output signal is not contaminated by unwanted noise.
Here it is shown steps to how to design a common drain JFET amplifier. In common drain JFET amplifier, the input signal is applied to the gate and the output is taken from source. The magnitude of the output signal is approximately equal to the magnitude of the input signal. In other words the voltage gain is less than or nearly equal to unity. Because the magnitude of the input and output are nearly equal and also because there is no phase shift between the input and output the circuit is called source follower. The main advantage of common drain is that the input impedance is high and the output impedance is low and generate less noise. Because of this common drain JFET amplifier is used as buffer to couple high impedance source to low impedance load such as in front end of communication system.
Below is circuit design of a common drain JFET amplifier.
In the circuit above, the input signal V1 is coupled via the capacitor CC1 into the JFET biased circuit. The output is coupled to the load resistor RL via the coupling capacitor CC2. To design the common drain amplifier the JFET is first DC biased. After DC biasing AC biasing is done where the coupling capacitors and other quantities are calculated.
Here are the steps to design a common drain JFET amplifier:
Step 1: Obtain gate to source cutoff voltage\(V_{GS(off)}\) and gate shorted drain current\(I_{DSS}\) from the JFET datasheet. Assume power supply voltage\(V_{DD}\) and the input signal frequency(f).
Here we will use the 2N5459 JFET with \(V_{GS(off)}=-1.02V\) and \(I_{DSS}=10mA\). Let \(V_{DD}=+5V\) and the input signal frequency be 1KHz.
Step 2: Calculate the quiescent drain current \(I_{DQ}\) and quiescent gate to source voltage \(V_{GSQ}\)
We use the following assumption which is quite close.
\(I_{DQ}=\frac{I_{DSS}}{4}=\frac{10mA}{4}=2..5mA\)
\(V_{GSQ}=\frac{V_{GS(off)}}{2}=\frac{-1.02}{2}=-0.51V\)
Step 3: Obtain gate voltage \(V_G\) and the pinch off voltage \(V_p\)
\(V_G = -V_{GS}=-(-0.51V)=0.51V\)
And also, \(V_p = |-V_{GS}|=|-0.51V|=0.51V\)
Step 4: Select biasing resistor \(R_2\) and determine the biasing resistor \(R_1\)
Let \(R_1 = 10K\Omega\)
Since, \(V_G = \frac{R_2}{R_1+R_2}V_{DD}\)
Solving for \(R_1\),
\(R_{1}=R_2(\frac{V_{DD}}{V_{G}}-1)=10k\Omega(\frac{5V}{0.51V}-1)=88k\Omega\)
Step 5: Obtain source voltage\(V_S\)
We have, \(V_{GS}=V_G-V_S\)
or, \(V_S=V_G-V_{GS}=0.51V-(-0.51V)=1.02V\)
Step 6: Determine drain to source voltage \(V_{DS}\)
\(V_{DS}=V_D-V_S=5V-1.02V=3.98V\)
Step 7: Determine source resistor \(R_S\)
\(R_S = \frac{V_S}{I_DQ}=\frac{1.02V}{2.5mA}=408\Omega\)
Step 8: Select load resistor \(R_L\) and determine ac drain resistance \(r_d\)
\(r_s = R_S || R_L = \frac{R_S R_L}{R_S+R_L}\)
or, \(r_s = \frac{(408\Omega) (500\Omega)}{408\Omega+500\Omega}=224.67\Omega\)
Step 9: Determine transconductance \(g_m\)
We have the transconductance formula,
\(g_m = \frac{2 I_{DSS}}{V_p} (1-\frac{V_{GS}}{V_p})\)
or, \(g_m = \frac{2 (10mA)}{0.51V} (1-\frac{-0.51V}{0.51V})=78.43 mS\)
Step 10: Determine the voltage gain, \(A_v\)
\(A_v = \frac{g_m r_s}{1+g_m r_s}\)
or, \(A_v = \frac{(78.43mS)(224.67\Omega)}{1+(78.43mS)(224.67\Omega)}=0.95\)
Step 11: Determine the input impedance, \(Z_i\)
\(Z_i = R_1 || R_2\)
or, \(Z_i = 88k\Omega || 10k\Omega =\frac{88k\Omega \times 10k\Omega}{88k\Omega+10k\Omega}=8.98 KΩ\)
Step 12: Determine the input coupling capacitor, \(CC_1\)
\(CC_1 = \frac{10}{2\pi f Z_i}\)
or, \(CC_1 = \frac{10}{2\pi f (8.98 KΩ)}=177.32 nF\)
Step 13: Determine the input impedance, \(Z_o\)
\(Z_o = R_S||\frac{1}{g_m}\)
or, \(Z_o = R_S||\frac{1}{g_m}=12.36 Ω\)
Step 14: Determine the input coupling capacitor, \(CC_2\)
\(CC_2 = \frac{10}{2\pi f Z_o}\)
or, \(CC_2 = \frac{10}{2\pi f (12.36 Ω)}=128.79 uF\)
These values can also be directly calculated using the online JFET amplifier design calculator.
Shown below is the completed Common Drain JFET amplifier with the calculated values.
The following shows the Q-point on drain curve of the above common drain JFET amplifier.
As can be seen from the above drain curve, the Q-point (V_{DSQ},I_{DQ})=(3.98V,2.5mA) lies in the active region.
The following shows the Q-point on transonductance curve of common drain JFET amplifier.
The following shows input signal and output signal waveforms on oscilloscope. The input signal is of 100mV and frequency of 1KHz.
From the oscilloscope the amplitude of the output signal is 70mV. The frequency of the output signal is same as the input signal frequency which is 1KHz. As can be seen from the oscilloscope the output signal is in phase with the input signal.
In summary, the Common Drain JFET Amplifier is a versatile, simple and cost-effective circuit that is well suited to a wide range of applications. The steps of designing a common drain JFET amplifier was explained. If you are interested in amplifier design with JFET device see the tutorials voltage divider biased JFET amplifier or self biased JFET amplifier.
